Kishan Jainandunsing
(March 2006)
IDF Spring, March 2006, San Francisco – Intel and partners push for extended battery life initiatives for mobile computing applications around Intel's x86 CPUs and chipsets. These initiatives cover the CPU and chipset, the display, memory and battery subsystems, with the goal of achieving 8 hours operation on a single battery charge.
On the CPU and chipset front, Intel presented its next generation, power optimized CPU and chipset, named Merom and Chrestline, respectively. Merom offers lower power dissipation through several architectural innovations [see March '06 Headline: Intel Reveals Next Generation Multi-Core Micro-architecture], including moving to a 45nm Silicon process that results in 30% lower transistor dynamic power consumption. In addition it revealed Robson [see March '06 Headline: Intel Slashes Boot Up and Load Times with Robson], a technology that reduces HDD power consumption by caching HDD reads and writes in non-volatile NAND Flash memory.
Intel and TMD (Toshiba Matsushita Display Technology Co. Ltd) presented joint development of D2PO (Dynamic Display Power Optimization), a novel display technology that dynamically switches between progressive scan and interlaced modes. Progressive scan mode is used for scenes with rapid movements in them and interlaced mode is used for scenes that are either static or do not have rapid movements. The technology uses motion estimation to drive switching between the two modes. The In this partnership Intel is developing support for D2PO in its graphics controllers and drivers and TMD is developing the panel technology. The partners report approximately 400mW of power savings in tests so far.
Initiatives and progress of The Extended Battery Life Working Group (EBLWG) included: (a) product design guidance through research conducted on mobile usage patterns over 1,200 users in 3 countries, (b) supplier recommendations for LCD panels resulting in over 10 million panels shipped with power consumption of less than 3W and (c) fuel cell guidelines for fuel cell developers.The EBLWG continues work on supplier recommendations for other subsystems, including memory modules, hard disk drives, optical drives, expansion cards, etc.
In the area of power consumption reduction of system memory, progress is being made through two technologies: (a) Delta Temperature or DT, and (b) Thermal sensing or TS. DT infers the temperature of the memory from its IDD current consumption, using a temperature-IDD correlation table stored in SPD ROM on the memory module. TS measures the actual temperature through a thermal sensor on the memory module. Intel chipsets that support memory temperature sensing can read the DT or sensor temperature values and throttle read/write bandwidth on demand to control the temperature of the memory module. DT in general does not maximize, but approximates optimal memory bandwidth vs. memory temperature. As such it is less optimal than TS, but much better than nothing at all. DT memory has become available as of recent. Infineon was among the first companies at the IDF to announce that it has started sampling TS memory modules.
